[MMRF]HWPOR R_CW479=0x0, W_CW479=0x1
[MMRF]HWPOR R_CW740=0x0, W_CW740=0x401
[MMRF]HWPOR R_CW741=0x0, W_CW741=0x401
[MMRF]HWPOR R_CW761=0x0, W_CW761=0x16
[MMRF]HWPOR R_CW762=0x0, W_CW762=0x14
[MMRF]HWPOR R_CW763=0x0, W_CW763=0x14
[MMRF]HWPOR R_CW747=0x0, W_CW747=0x4
[MMRF]HWPOR R_CW748=0x0, W_CW748=0x4
[MMRF]HWPOR R_CW749=0x0, W_CW749=0x4
[MMRF]HWPOR R_CW751=0x0, W_CW751=0x4
[MMRF]HWPOR R_CW772=0x0, W_CW772=0x4E
[MMRF]HWPOR R_CW773=0x0, W_CW773=0x4E
[MMRF]HWPOR R_CW774=0x0, W_CW774=0x33
[MMRF]HWPOR R_CW776=0x0, W_CW776=0x1CC
[MMRF]HWPOR R_CW752=0x0, W_CW752=0xA
[MMRF]HWPOR R_CW777=0x0, W_CW777=0x64
sw version: MOLY.LR11.W1603.MD.MP.V17.P32
project: LR11.W1603.MD.MP ZNJ6755_C66_M(LWCTG_MP3_50)
build time: 2017/03/20 11:43
[1][L1CORE] Assert fail: mml1_rf_error_check.c 156 0x0 0x0 0x0 - MRF
[1] Expression: RF_Chip_Version_Check
Caution: To re-dump DHL ring buffer!
etstm task init

SWLA is successfully enabled
BRP
prj: MT6750
flv: DEFAULT
lbl: MOLY.LR11.W1603.MD.MP.V17.P32
tm: 2017/02/16 20:31
DFE
prj: MT6750
flv: DEFAULT
lbl: MOLY.LR11.W1603.MD.MP.V17.P32
tm: 2017/02/16 20:32
RAKE
prj: MT6750
flv: DEFAULT
lbl: MOLY.LR11.W1603.MD.MP.V17.P32
tm: 2017/02/16 20:30
ICC
prj: MT6750
flv: DEFAULT
lbl: MOLY.LR11.W1603.MD.MP.V17.P32
tm: 2017/02/16 20:22
IMC
prj: MT6750
flv: DEFAULT
lbl: MOLY.LR11.W1603.MD.MP.V17.P32
tm: 2017/02/16 20:24
MPC
prj: MT6750
flv: DEFAULT
lbl: MOLY.LR11.W1603.MD.MP.V17.P32
tm: 2017/02/16 20:27
[MMRF] L1-core mmrf task start
[MMRF] UL1D BSI Init start
[MMRF] UL1D BSI Init end
[MMRF] EL1D BSI Init start
[MMRF] EL1D BSI Init end
[MMRF] RF Init Phase1 start
[MMRF]HWPOR R_CW128=0x0, W_CW128=0x5EE01
[MMRF]HWPOR R_CW129=0x0, W_CW129=0x5EE07
[MMRF]HWPOR R_CW147=0x0, W_CW147=0x556DB
[MMRF]HWPOR R_CW149=0x0, W_CW149=0x5D5FF
[MMRF]HWPOR R_CW150=0x0, W_CW150=0x12493
[MMRF]HWPOR R_CW151=0x0, W_CW151=0x51252
[MMRF]HWPOR R_CW157=0x0, W_CW157=0xC7BDE
[MMRF]HWPOR R_CW158=0x0, W_CW158=0xFFB18
[MMRF]HWPOR R_CW159=0x0, W_CW159=0xC77BD
[MMRF]HWPOR R_CW160=0x0, W_CW160=0xEE318
[MMRF]HWPOR R_CW162=0x0, W_CW162=0xA90FE
[MMRF]HWPOR R_CW163=0x0, W_CW163=0x22944
[MMRF]HWPOR R_CW166=0x0, W_CW166=0xA358C
[MMRF]HWPOR R_CW172=0x0, W_CW172=0x50DEA
[MMRF]HWPOR R_CW173=0x0, W_CW173=0x20C83
[MMRF]HWPOR R_CW174=0x0, W_CW174=0x63508
[MMRF]HWPOR R_CW175=0x0, W_CW175=0x2959
[MMRF]HWPOR R_CW176=0x0, W_CW176=0x1B69C
[MMRF]HWPOR R_CW180=0x0, W_CW180=0xE4B92
[MMRF]HWPOR R_CW188=0x0, W_CW188=0x50C3
[MMRF]HWPOR R_CW197=0x0, W_CW197=0x42008
[MMRF]HWPOR R_CW198=0x0, W_CW198=0x14DC
[MMRF]HWPOR R_CW247=0x0, W_CW247=0x55924
[MMRF]HWPOR R_CW249=0x0, W_CW249=0x5F5FF
[MMRF]HWPOR R_CW250=0x0, W_CW250=0x924A
[MMRF]HWPOR R_CW251=0x0, W_CW251=0x5550A
[MMRF]HWPOR R_CW256=0x0, W_CW256=0x20000
[MMRF]HWPOR R_CW257=0x0, W_CW257=0xC7BDE
[MMRF]HWPOR R_CW258=0x0, W_CW258=0xFFBF8
[MMRF]HWPOR R_CW259=0x0, W_CW259=0xC77BD
[MMRF]HWPOR R_CW260=0x0, W_CW260=0xEE318
[MMRF]HWPOR R_CW262=0x0, W_CW262=0xA90FE
[MMRF]HWPOR R_CW263=0x0, W_CW263=0x22944
[MMRF]HWPOR R_CW265=0x0, W_CW265=0x43529
[MMRF]HWPOR R_CW266=0x0, W_CW266=0xA368C
[MMRF]HWPOR R_CW271=0x0, W_CW271=0x4A524
[MMRF]HWPOR R_CW272=0x0, W_CW272=0x49129
[MMRF]HWPOR R_CW273=0x0, W_CW273=0x20C83
[MMRF]HWPOR R_CW280=0x0, W_CW280=0xD4751
[MMRF]HWPOR R_CW288=0x0, W_CW288=0x50C3
[MMRF]HWPOR R_CW297=0x0, W_CW297=0x42008
[MMRF]HWPOR R_CW298=0x0, W_CW298=0x293
[MMRF]HWPOR R_CW533=0x0, W_CW533=0xAA
[MMRF]HWPOR R_CW564=0x0, W_CW564=0x35648
[MMRF]HWPOR R_CW565=0x0, W_CW565=0xA5148
[MMRF]HWPOR R_CW566=0x0, W_CW566=0x48000
[MMRF]HWPOR R_CW567=0x0, W_CW567=0xF00FF
[MMRF]HWPOR R_CW548=0x0, W_CW548=0x722EC
[MMRF]HWPOR R_CW544=0x0, W_CW544=0x60
[MMRF]HWPOR R_CW725=0x0, W_CW725=0x19050
[MMRF]HWPOR R_CW726=0x0, W_CW726=0x401
[MMRF]HWPOR R_CW731=0x0, W_CW731=0x15401
[MMRF]HWPOR R_CW787=0x0, W_CW787=0xE0000
[MMRF]HWPOR R_CW800=0x0, W_CW800=0x80000
[MMRF]HWPOR R_CW801=0x0, W_CW801=0x2EFFF
[MMRF]HWPOR R_CW727=0x0, W_CW727=0x1403C
[MMRF]HWPOR R_CW798=0x0, W_CW798=0x6DB08
[MMRF]HWPOR R_CW730=0x0, W_CW730=0x400
[MMRF]HWPOR R_CW705=0x0, W_CW705=0x864
[MMRF]HWPOR R_CW706=0x0, W_CW706=0x7BFC0
[MMRF]HWPOR R_CW713=0x0, W_CW713=0x80000
[MMRF]HWPOR R_CW396=0x0, W_CW396=0x14B
[MMRF]HWPOR R_CW470=0x0, W_CW470=0x1
[MMRF]HWPOR R_CW479=0x0, W_CW479=0x1
[MMRF]HWPOR R_CW740=0x0, W_CW740=0x401
[MMRF]HWPOR R_CW741=0x0, W_CW741=0x401
[MMRF]HWPOR R_CW761=0x0, W_CW761=0x16
[MMRF]HWPOR R_CW762=0x0, W_CW762=0x14
[MMRF]HWPOR R_CW763=0x0, W_CW763=0x14
[MMRF]HWPOR R_CW747=0x0, W_CW747=0x4
[MMRF]HWPOR R_CW748=0x0, W_CW748=0x4
[MMRF]HWPOR R_CW749=0x0, W_CW749=0x4
[MMRF]HWPOR R_CW751=0x0, W_CW751=0x4
[MMRF]HWPOR R_CW772=0x0, W_CW772=0x4E
[MMRF]HWPOR R_CW773=0x0, W_CW773=0x4E
[MMRF]HWPOR R_CW774=0x0, W_CW774=0x33
[MMRF]HWPOR R_CW776=0x0, W_CW776=0x1CC
[MMRF]HWPOR R_CW752=0x0, W_CW752=0xA
[MMRF]HWPOR R_CW777=0x0, W_CW777=0x64
sw version: MOLY.LR11.W1603.MD.MP.V17.P32
project: LR11.W1603.MD.MP ZNJ6755_C66_M(LWCTG_MP3_50)
build time: 2017/03/20 11:43
[1][L1CORE] Assert fail: mml1_rf_error_check.c 156 0x0 0x0 0x0 - MRF
[1] Expression: RF_Chip_Version_Check
sw version: MOLY.LR11.W1603.MD.MP.V17.P32
project: LR11.W1603.MD.MP ZNJ6755_C66_M(LWCTG_MP3_50)
build time: 2017/03/20 11:43
[1][PCORE] Fatal Error (Cross Core Exception) Triggered by L1CORE : ECT status(0x00000002): (0x3100, 0x3c2b3)
[1][L1CORE] Assert fail: mml1_rf_error_check.c 156 0x0 0x0 0x0 - MRF
Memory dump is enabled!
You can do memory dump after re-dumping TST ring buffer is finished.
sw version: MOLY.LR11.W1603.MD.MP.V17.P32
project: LR11.W1603.MD.MP ZNJ6755_C66_M(LWCTG_MP3_50)
build time: 2017/03/20 11:43
[1][PCORE] Fatal Error (Cross Core Exception) Triggered by L1CORE : ECT status(0x00000002): (0x3100, 0x3c2b3)
Caution: To re-dump DHL ring buffer!
SWLA ASM_WRAP_MODE is successfully enabled
[MMRF] Init WMID = 39, Run Time WMID[for Meta only] = 39
[INFO] Please start to dump memory.